Abstract :
• 8086 is
an enhanced version of 8085 that has been developed by Intel in 1976.
• It
is a 16 bit Microprocessor. It has a powerful instruction set and it is capable to providing multiplication and division
operations directly. It has 20 address lines and 16 data lines. So it can access
up to 1 MB of memory.
• It supports two modes of operation: first
is maximum mode and second is minimum mode. Minimum mode is applicable for system
that has a single processor and maximum mode is used for the multiprocessor system.
• 8086 provides an additional features that
it has an instruction queue capable to store six instruction bytes from the memory.
The next instruction is fetched while the present instruction is being executed.
So it makes the processor fast.
Features of
8086
• 8086
is a 40 pin IC.
• It is
a 16-bit processor.
• Its operating
voltage is 5 volts.
• Its operating
frequency is 5 MHz
• Total
memory addressing capacity is 1MB (external).
• It has
16-bit data bus and 20-bit address bus.
• It has
fourteen 16-bit registers.
• Higher
throughput (speed).
• It has
around 20000 transistors in its circuitry and it is made in HMOS technology.
Block Diagram
of Intel 8086
The 8086 CPU
is divided into two independent functional units:
1. Bus Interface
Unit (BIU)
2. Execution
Unit (EU)
Addressing Modes
for Control Transfer Instruction
• Intra-segment direct mode: In this mode, the
address to which the control is to be transferred lies in the same segment in which
the control transfers instruction lies and appears directly in the instruction as
an immediate displacement value. In this addressing mode, the displacement is computed
relative to the content of the instruction pointer IP.
• The effective
address to which the control will be transferred is given by the sum of 8 or 16 bit displacement
and current content of IP. In case of jump instruction, if the signed displacement
(d) is of 8 bits (i.e. –128<d<+128), we term it as short jump and if it is
of 16 bits (i.e.
–32768<+32768), it is termed as long jump.
• Intra-segment Indirect Mode: In this mode,
the displacement to which the control is to be transferred is in the same segment
in which the control transfer instruction lies, but it is passed to the instruction
indirectly. Here, the branch address is found as the content of a register or a
memory location. This addressing mode may
be used in unconditional branch instructions.T
• Inter-segment Direct
Mode: In this mode, the address to which the control is to be transferred is in a different
segment. This addressing
mode provides a means
of branching from one code segment to another
code segment. Here, the CS and IP of the destination address are specified directly
in the instruction.
• Inter-segment Indirect Mode: In this mode,
the address to which the control is to be transferred lies in a different segment
and it is passed to the instruction indirectly, i.e. contents of a memory block
containing four bytes, i.e. IP (LSB), IP (MSB), CS (LSB) and CS (MSB) sequentially.
The starting address of the memory block may be referred using any of the addressing
modes, except immediate mode.
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